Delay locked loop circuit and method thereof

Details Delay locked loop circuit and method thereof Delay locked loop circuit and method thereof

2008-06-30

2010-02-23

Cox, Cassandra (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

07667510

ABSTRACT:
A delayed locked loop (DLL) circuit for reducing power consumption in updating a delay value of an external clock after locking. The DLL circuit includes a phase comparator for comparing a phase of a feedback clock and a phase of an external clock, and a delay unit for delaying an external clock in response to a comparison signal from the phase comparison. A replica unit receives the delayed external clock and outputs the feedback clock. A toggling controller disables toggling of the delayed external clock that is inputted to the replica unit for a predetermined time at a regular interval after locking.

REFERENCES:
patent: 6191632 (2001-02-01), Iwata et al.
patent: 6278303 (2001-08-01), Nakanishi et al.
patent: 6463008 (2002-10-01), Okuda et al.
patent: 6498524 (2002-12-01), Kawasaki et al.
patent: 6985401 (2006-01-01), Jang et al.
patent: 7034590 (2006-04-01), Shin
patent: 7489172 (2009-02-01), Kim
patent: 2001/0052808 (2001-12-01), Hamamoto et al.
patent: 2003/0076143 (2003-04-01), Nishimura et al.
patent: 1020040093819 (2004-11-01), None
patent: 1020050089474 (2005-09-01), None
patent: 1020050097700 (2005-10-01), None
patent: 1020070110627 (2007-11-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Aug. 26, 2009 with an English Translation.

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