Delay locked loop and delay locking method having burst...

Details Delay locked loop and delay locking method having burst... Delay locked loop and delay locking method having burst...

2009-06-30

2011-10-11

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000

Reexamination Certificate

active

08035431

ABSTRACT:
A Delay Locked Loop (DLL) includes a replica delay unit configured to delay an output clock to generate a feedback clock; a phase detector configured to measure a phase difference between the feedback clock and an input clock; a quantization unit configured to quantize the phase difference measured by the phase detector; and a delay unit configured to delay the input clock based on a quantization result from the quantization unit to generate the output clock.

REFERENCES:
patent: 7079616 (2006-07-01), Castiglione et al.
patent: 7111185 (2006-09-01), Gomm et al.
patent: 7173462 (2007-02-01), Wang
patent: 2007/0182469 (2007-08-01), Zimlich
patent: 2010/0277211 (2010-11-01), Geng et al.
patent: 2010/0289541 (2010-11-01), Wu
patent: 2010/0301912 (2010-12-01), Kim et al.
patent: 09-321658 (1997-12-01), None
Notice of Allowance issued from Korean Intellectual Property Office on Feb. 7, 2011.

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