Delay lock loops for wireless communication systems

Details Delay lock loops for wireless communication systems Delay lock loops for wireless communication systems

2006-03-03

2010-10-19

Corrielus, Jean B (Department: 2611)

Pulse or digital communications

Synchronizers

Synchronizing the sampling time of digital data

C370S503000, C375S227000

Reexamination Certificate

active

07817760

ABSTRACT:
Techniques for deriving sample timing for multiple signal instances received on multiple antennas for a given propagation path. In one scheme, a DLL is maintained for each path, and each DLL tracks the timing of the best signal instance for the assigned path. In another scheme, a DLL is maintained for each path, and each DLL tracks the average timing of the multiple signal instances for the assigned path. To reduce timing jitter, the SINR of a signal instance may be estimated for a number of different time offsets. The loop filter for the DLL is initially updated in the normal manner. If a change in the time offset used for the sample timing is detected, then the SINRs for the new and prior offsets are compared. The new time offset is used if the associated SINR is better. Otherwise, the prior time offset is retained and used.

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