Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2007-01-02
2007-01-02
Zarabian, Amir (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S194000, C327S156000, C327S158000
Reexamination Certificate
active
11142946
ABSTRACT:
A delay-lock loop receives an input clock signal from the output of a programmable divider that receives a reference clock signal. The delay-lock loop includes a voltage-controlled delay line generating a plurality of delayed clock signals having different phases. A plurality of the delayed clock signals are combined to generate a plurality of output signals. During an initialization period, an initialization circuit sets the delay of the delay line to a minimum delay value and then compares this delay value to the period of the input clock signal. Based on this comparison, the initialization circuit programs the programmable divider and adjusts the number of delayed clock signals combined to generate the output signals. More specifically, as the frequency of the reference clock signal increases, the divider is programmed to divide by a greater number, and a larger number of delay clock signals are combined to generate the output signals.
REFERENCES:
patent: 4952888 (1990-08-01), Izumi
patent: 5771264 (1998-06-01), Lane
patent: 6043717 (2000-03-01), Kurd
patent: 6066969 (2000-05-01), Kawasaki et al.
patent: 6157247 (2000-12-01), Abdesselem et al.
patent: 6198689 (2001-03-01), Yamazaki et al.
patent: 6292040 (2001-09-01), Iwamoto et al.
patent: 6437616 (2002-08-01), Antone et al.
patent: 6510191 (2003-01-01), Bockelman
patent: 6621312 (2003-09-01), Tang et al.
patent: 6798266 (2004-09-01), Vu et al.
patent: 6842399 (2005-01-01), Harrison
patent: 6859028 (2005-02-01), Toner
patent: 6903615 (2005-06-01), Landman et al.
patent: 2002/0056854 (2002-05-01), Tang et al.
patent: 2002/0109495 (2002-08-01), Antone et al.
patent: 2004/0064752 (2004-04-01), Kazachinsky et al.
patent: 2004/0076055 (2004-04-01), Harrison
patent: 2005/0077937 (2005-04-01), Meyer
patent: 2006/0018370 (2006-01-01), Mizuno
Dorsey & Whitney LLP
Tran Anthan
Zarabian Amir
LandOfFree
Delay-lock loop and method adapting itself to operate over a... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Delay-lock loop and method adapting itself to operate over a..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delay-lock loop and method adapting itself to operate over a... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3767117