Delay lock loop

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328 55, H03K 5153

Patent

active

043385699

ABSTRACT:
A delay lock loop has a fixed delay element, means for detecting the edge transitions of pulses, analog or digital feedback means related to the timing differences between the edge transitions of a pair of pulses and a variable delay means responsive to the feedback means for adjusting the timing differences between a pair of pulses in response to the feedback signals. In the analog embodiment, the feedback may be a voltage related feedback with a varying voltage controlling a voltage responsive variable delay means. In the digital embodiment, the feedback means may use a counter responsive to signals from an edge detecting flip-flop and the counter may control a programmable delay means.

REFERENCES:
patent: 4051440 (1977-09-01), Nelson et al.
patent: 4055814 (1977-10-01), Abraham et al.
patent: 4065796 (1977-12-01), Dehart
patent: 4105932 (1978-08-01), Cleary et al.
patent: 4137503 (1979-01-01), Ziesmer
patent: 4142158 (1979-02-01), Belisomi
patent: 4181975 (1930-09-01), Jenkins
patent: 4280099 (1981-07-01), Rattlingourd

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