Delay line with a parallel capacitance for adjusting the...

Details Delay line with a parallel capacitance for adjusting the... Delay line with a parallel capacitance for adjusting the...

2005-03-08

2005-03-08

Lee, Benny (Department: 2817)

Wave transmission lines and networks

Coupling networks

Delay lines including long line elements

C333S156000, C333S139000

Reexamination Certificate

active

06864760

ABSTRACT:
A delay line comprising a dielectric substrate including a pair of main surfaces; a transmission line disposed on one of the main surfaces of the dielectric substrate; a ground conductor disposed on the other of the main surfaces of the dielectric substrate; and at least one of a variable capacitor and a diode being disposed on the dielectric substrate and connected in parallel to the transmission line for setting a desired delay time of the delay line. In the above delay line, the delay time can be adjusted even after the delay line is mounted on a printed circuit board, and further, the delay time can be continuously adjusted. The delay line can also be formed in a multilayer structure rather than on the above dielectric substrate.

REFERENCES:
patent: 4701714 (1987-10-01), Agoston
patent: 5187455 (1993-02-01), Mandai et al.
patent: 5208213 (1993-05-01), Ruby
patent: 5436601 (1995-07-01), Mandai et al.
patent: 5760661 (1998-06-01), Cohn
patent: 5929722 (1999-07-01), Kono
patent: 6201457 (2001-03-01), Hickernell
patent: 6633748 (2003-10-01), Watanabe et al.
patent: 1239596 (1971-07-01), None
patent: 62097416 (1987-05-01), None
patent: 62-109418 (1987-05-01), None
European Search Report dated Jan. 24, 2002.

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