Delay line for analogous signals

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307251, H03K 2100

Patent

active

039393640

ABSTRACT:
This relates to a bucket-brigade delay line wherein clock frequency dependent modulation of the delayed signal is avoided by inserting at least one inverter stage into the delay line. The output of the inverter stage contains the inverted modulation signal. This signal is then added to the line thereby compensating for the unwanted modulation.

REFERENCES:
patent: 3746883 (1973-07-01), Kovac
patent: 3819953 (1974-06-01), Puckette et al.
patent: 3838293 (1974-09-01), Shah
"Noise Compensator for Charge-Coupled Devices" by Chai et al., IBM Tech. Discl. Bull. Vol. 16 No. 4 Sept. 73 pp. 1099, 1100.

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