Delay line and its manufacturing method

Details Delay line and its manufacturing method Delay line and its manufacturing method

1987-05-13

1989-01-24

LaRoche, Eugene R.

Wave transmission lines and networks

Coupling networks

Delay lines including a lumped parameter

333156, 333161, 296021, H03H 718

Patent

active

048003468

ABSTRACT:
A lumped constant delay line has a substrate, capacitor element disposed on one surface of the substrate provided with a through hole therein, an inductor electrode which is dispossed on the other surface of the substrate and is connected to the capacitor elements by means of a through hole conductive section consisting of coated inside wall of the through hole by means of conductive adhesive and an inductor pin soldered onto the inductor electrode while a distributed constant type delay line has an insulating substrate on which a ferrite layer, an inductance layer, a dielectric layer and a ground electrode layer are superposed one after another and a wiper makes sliding on a wiper base composed of a group of parallel taps which are led out from the meandering paths of the inductance conductive layer and converged toward one side of the insulating substrate whereby to cause variation of delay time of the delay line.

REFERENCES:
patent: 3141144 (1964-07-01), Watts, Jr.
patent: 3257629 (1966-06-01), Kornretch
patent: 3490055 (1970-01-01), Cox
patent: 3585535 (1971-06-01), Seuf
patent: 3602846 (1971-08-01), Hauser
patent: 4203081 (1980-05-01), Braeckelmann
patent: 4272741 (1981-06-01), Vanderknyff
patent: 4547961 (1985-10-01), Bokit et al.
patent: 4591814 (1986-05-01), Ito et al.
patent: 4626816 (1986-12-01), Blumkin et al.
patent: 4641112 (1987-02-01), Kohayakawa
patent: 4649356 (1987-03-01), Kameya

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