Delay correction circuit

Details Delay correction circuit Delay correction circuit

1980-10-24

1983-08-30

Robinson, Thomas A.

Multiplex communications

Wide area network

Packet switching

370108, G06F 1300, G11B 1300

Patent

active

044020791

ABSTRACT:
A delay correction circuit is described for use with an elastic store in a PCM time division multiplexed system. The relative position of the read and write addresses supplied to the elastic store are monitored. In the event that either the read or write addresses are overtaking the other and are within a predetermined range of addresses, either the read or write address source will be initialized at a predetermined time such that the read and write addresses have new relative position.

REFERENCES:
patent: 3500330 (1970-03-01), Hertz
patent: 4121058 (1978-10-01), Jusko et al.
patent: 4271483 (1981-06-01), Baldwin et al.

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