Delay circuit which is free from temperature variation, power su

Details Delay circuit which is free from temperature variation, power su Delay circuit which is free from temperature variation, power su

1990-09-13

1992-07-14

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307597, 307603, 307605, 307608, 307228, 307262, 323315, 323316, H03K 513, H03K 500, H03K 408, G05F 316

Patent

active

051305828

ABSTRACT:
A delay circuit for delaying a digital input signal has a ramp generator, a logic circuit which provides a delayed output when the ramp voltage reaches threshold voltage, and a bias circuit which provides bias voltage to the ramp generator so that the delayed output is free from temperature variation, power supply voltage variation and process variation of semiconductor elements.

REFERENCES:
patent: 4843265 (1989-06-01), Jiang

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