Delay circuit using a digital memory

Details Delay circuit using a digital memory Delay circuit using a digital memory

1994-06-28

1996-11-19

Young, Brian K.

Coded data generation or conversion

Analog to digital conversion followed by digital to analog...

H03M 100

Patent

active

055767095

ABSTRACT:
An adder 22, a quantizer 20, and a variable integrator 24 execute A/D conversion and the result is stored in a memory 12. A time constant of the variable integrator at this time is controlled by a time constant controller 25. On the other hand, data from the memory is integrated by a variable integrator 28 to provide an analog signal. At this time, control data of the time constant controller 25 is transferred via a memory 32 to a time constant controller 33, which then uses the transferred control data to control the time constant of the variable integrator 28. When a mode is changed, switches 34 and 35 are turned off. Therefore, a signal with no input can be written into the memory 12 for initializing the memory 12.

REFERENCES:
patent: 4219880 (1980-08-01), Nichols
patent: 4308585 (1981-12-01), Jordan
European Search Report, dated Mar. 24, 1995, Appl. No. 94304767.0.
Ishikawa, et al., "One-bit A/D D/A Converters IC for Audio Delay", IEEE Transactions on Consumer Electronics, vol. 35, No. 4, Nov. 1989.
European Search Report, dated Jul. 18, 1995, Appl. No. 94304767.0.
K. J. Dimmler, et al., "New 64K Memory Chip Gets the Picture", AT&T Bell Laboratories Record, No. 1, Jan. 1985.
T. Ishikawa, et al., "One-Bit A/D Converters IC For Audio Delay", IEEE Transactions on Consumer Electronics, vol. 35, No. 4, Nov. 1989, pp. 767-773.

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