Delay circuit, test apparatus, storage medium semiconductor...

Details Delay circuit, test apparatus, storage medium semiconductor... Delay circuit, test apparatus, storage medium semiconductor...

2011-07-26

2011-07-26

Dunn, Drew A (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system in a specific environment

Electrical signal parameter measurement system

C702S089000, C702S090000, C702S091000, C327S161000, C327S261000

Reexamination Certificate

active

07987062

ABSTRACT:
A delay circuit includes a first delay element, a second delay element, and an initializing section that measures a delay amount generated by the first delay element with respect to each delay setting value. The initializing section includes a first loop path that inputs an output signal of the first delay element into the first delay element and a second loop path that inputs an output signal of the second delay element into the second delay element. The initialization section includes a first measuring section that sequentially sets delay setting values mutually different from the delay setting value in the first delay element and sequentially measures delay amounts in the first delay element, a second measuring section that measures a delay amount in the second delay element, and a delay amount computing section that corrects a delay amount measured by the first measuring section.

REFERENCES:
patent: 4859970 (1989-08-01), Matsuo et al.
patent: 5491673 (1996-02-01), Okayasu
patent: 6812799 (2004-11-01), Kirsch
patent: 2004/0054482 (2004-03-01), Poechmueller
patent: 2005/0001648 (2005-01-01), Yamamoto
patent: 2001-215261 (2001-08-01), None
patent: 2002-359289 (2002-12-01), None

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