Delay circuit for a write data precompensator system

Details Delay circuit for a write data precompensator system Delay circuit for a write data precompensator system

1995-09-14

1997-01-14

Cunningham, Terry

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327154, 327161, 327276, H03H 1126

Patent

active

055943772

ABSTRACT:
A write data precompensator system is described which comprises a delay element circuit (12) which receives a clock signal and outputs a delayed clock signal which includes a programmable selectable delay in the rising edge of the clock signal. The amount of delay is received using a delay voltage level generated by a delay level circuit (16) which receives delay magnitude control values in digital form. A reference level circuit (18) also generates a continuous level voltage level so that the delay element circuit (12) can instantly change between a delayed operation and an undelayed operation without waiting for the delay voltage level to adjust.

REFERENCES:
patent: 3763317 (1973-10-01), Coleman, Jr. et al.
patent: 4581585 (1986-04-01), Bristol
patent: 4914325 (1990-04-01), Yamada
patent: 4985639 (1991-01-01), Renfrow et al.
patent: 5111150 (1992-05-01), Casey
patent: 5124597 (1992-06-01), Stuebing et al.

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