Delay circuit and semiconductor device

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C327S261000, C327S271000

Reexamination Certificate

active

11318526

ABSTRACT:
A delay circuit comprises: N-stage circuits having a first circit to a N-th circuit connected in cascade, the input signal being input to the first circuit and a transmission signal delayed by a (k-1)-stage (where 2≦k≦N) circuit is input to a k-th circuit for sequential transmission; a common delay circuit for delaying the transmission signal of each stage commonly; and path control means for controlling a path of an i-th (1≦i≦N) circuit so that during a predetermined period from an edge timing of a signal input to the i-th circuit to an edge timing of the transmission signal delayed by the common delay circuit through the i-th circuit, the common delay circuit is connected to a signal path, and during the other period, the common delay circuit is disconnected from the signal path, wherein the delayed signal passing through the common delay circuit N times is generated.

REFERENCES:
patent: 5670904 (1997-09-01), Moloney et al.
patent: 6366149 (2002-04-01), Lee et al.
patent: 6958641 (2005-10-01), Lee
patent: 6989703 (2006-01-01), Kang
patent: 63-174724 (1988-11-01), None
patent: 10-032473 (1998-02-01), None

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