Delay circuit and related method thereof

Details Delay circuit and related method thereof Delay circuit and related method thereof

2009-09-03

2010-11-09

Luu, An T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S277000, C327S299000

Reexamination Certificate

active

07830192

ABSTRACT:
A delay circuit comprising a delay measurement unit, a delay mapping unit and a map delay module. The delay measurement unit generates a mapping table according to a reference signal and a reference clock signal. The delay mapping unit generates a mapped delay selection signal according to an input selection signal and at least a mapping value from the mapping table. The map delay module delays an input data signal to generate an output data signal according to the mapped delay selection signal.

REFERENCES:
patent: 5734283 (1998-03-01), Hedberg
patent: 6510191 (2003-01-01), Bockelman
patent: 6580301 (2003-06-01), Moshe
patent: 6590434 (2003-07-01), Chung
patent: 6720811 (2004-04-01), Yazawa
patent: 6930525 (2005-08-01), Lin
patent: 7332950 (2008-02-01), Blodgett
patent: 2008/0122471 (2008-05-01), Yamanaka
patent: 1433148 (2003-07-01), None

Affiliated with

Also associated with

Rating

Delay circuit and related method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Delay circuit and related method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Delay circuit and related method thereof will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4244284