Delay circuit and latch circuit for controlling setup time and h

Details Delay circuit and latch circuit for controlling setup time and h Delay circuit and latch circuit for controlling setup time and h

1990-11-01

1992-04-21

Miller, Stanley D.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307603, 307606, 328 55, H03K 513, H03K 1716

Patent

active

051071533

ABSTRACT:
A delay circuit composed of a plurality of series circuits connected to each other in parallel, wherein each of series circuits is composed of a switching element made of FET like N-channel transistor and a capacitor. And a semiconductor system which allows proper connection of other semiconductor systems containing different AC charcteristics by delaying internal clock, input pulse signal or output pulse signal by applying the delay circuit embodied by the invention.

REFERENCES:
patent: 4042842 (1977-08-01), Hegendorfer
patent: 4424456 (1984-01-01), Shiraki et al.
patent: 4694208 (1987-09-01), Szabo et al.
patent: 4785253 (1988-11-01), Hughes
patent: 5012143 (1991-04-01), Boudewijns

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