Delay circuit and delay locked loop circuit including the same

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C327S270000, C327S149000, C327S150000

Reexamination Certificate

active

07834674

ABSTRACT:
A delay circuit includes a delay line unit including a plurality of delay units configured to generate a plurality of delay input clocks by delaying an input clock by a unit delay amount in response to at least one delay control signal; and a signal selection unit configured to selectively output at least one of the plurality of delay input clocks in response to the delay control signal.

REFERENCES:
patent: 6009134 (1999-12-01), Yoon
patent: 7161397 (2007-01-01), Lee et al.
patent: 2008/0164920 (2008-07-01), Cho
patent: 2008/0309387 (2008-12-01), Yamane
patent: 11-284496 (1999-10-01), None
patent: 1020060112011 (2006-10-01), None
patent: 100837822 (2008-06-01), None
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Mar. 22, 2010.
Notice of Allowance issued from Korean Intellectual Property Office on Sep. 16, 2010.

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