Delay circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C327S264000, C327S268000

Reexamination Certificate

active

07746141

ABSTRACT:
A delay circuit includes a delay time setting circuit to set a delay time of an output signal with respect to an input signal, a first transistor connected to an input terminal of the delay time setting circuit and configured to set a first voltage to the input terminal of the delay time setting circuit and a second transistor connected to an output terminal of the delay time setting circuit and configured to reset the output terminal of the delay time setting circuit to a second voltage and clear the reset of the output terminal of the delay time setting circuit after the first voltage is set.

REFERENCES:
patent: 4707626 (1987-11-01), Inoue
patent: 4868525 (1989-09-01), Dias
patent: 5055713 (1991-10-01), Watanabe et al.
patent: 5068553 (1991-11-01), Love
patent: 5319607 (1994-06-01), Fujii et al.
patent: 6320443 (2001-11-01), Jeong
patent: 6541945 (2003-04-01), Smith
patent: 6661272 (2003-12-01), Kim et al.
patent: 2003/0231034 (2003-12-01), Koch, II et al.
patent: 2004/0212408 (2004-10-01), Indoh
patent: 63-217820 (1988-09-01), None
patent: 10-270988 (1998-10-01), None
patent: 2000-209077 (2000-07-01), None
patent: 2003-273712 (2003-09-01), None
Chinese Patent Office issued a Chinese Office Action dated Feb. 12, 2010. Application No. 200710112294.

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