Delay circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing

Reexamination Certificate

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Details

C327S156000, C327S149000

Reexamination Certificate

active

07629820

ABSTRACT:
A delay circuit includes a delay device, to which an input signal is supplied. A first phase-shifted signal can be generated by the delay device, which is delayed by a first delay time with respect to the input signal, and a second phase-shifted signal can be generated, which is delayed by a second delay time with respect to the input signal. The delay device is configured such that the first and second phase-shifted signal can be generated in inverted fashion with respect to one another at an output terminal of the delay device after a delay of the input signal by a delay time.

REFERENCES:
patent: 5796673 (1998-08-01), Foss et al.
patent: 6917229 (2005-07-01), Cho
patent: 7137022 (2006-11-01), Ishikawa
patent: 7391244 (2008-06-01), Morche
patent: 2003/0001636 (2003-01-01), Partsch et al.
patent: 2004/0070431 (2004-04-01), Henrickson
patent: 2005/0141334 (2005-06-01), Jeong
Pavel Petkov, et al., “An Infinite-Skew Tolerant Delay Locked Loop,” Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on May 21-24, 2006.

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