Delay circuit

Details Delay circuit Delay circuit

2007-03-06

2007-03-06

Mis, David (Department: 2817)

Oscillators

Ring oscillators

C327S237000, C327S246000, C327S250000, C327S252000

Reexamination Certificate

active

11156040

ABSTRACT:
A delay circuit according to embodiments of the present invention capable of operating over a wide range of frequencies is presented. Embodiments of the invention minimize or eliminate parasitic capacitance at the output terminals that arise from switching elements used to selectively add capacitive elements to the circuit to vary the operating frequency range.A ring oscillator using embodiments of the delay circuit according to the present invention is also presented. A sequence of an integral number of delay circuits according to the present invention is coupled in series to form a ring oscillator.In some embodiments the delay circuit or a ring oscillator incorporating the delay circuit may be fabricated as an integrated circuit.

REFERENCES:
patent: 7109775 (2006-09-01), Tomita
Young, Ian .A. et al., “A PLL Clock Generator with 5 to 110 MHz of Lock Range for Microprocessors,” IEEE Journal of Solid-State Circuits, vol. 27, No. 11, Nov. 1992, pp. 1599-1607.
Lin, Tsung-Hsien et al, “A 900-MHz 2.5-mA CMOS Frequency Synthesizer with an Automatic SC Tuning Loop,” IEEE Journal of Solid-State Circuits, vol. 36, No. 3, Mar. 2001, pp. 424-431.

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