Delay circuit

Electrical transmission or interconnection systems – With nonswitching means responsive to external nonelectrical... – Temperature responsive

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Details

307234, 307362, 307601, H03K 5153

Patent

active

048374660

ABSTRACT:
For reduction in occupying area and current consumed, there is disclosed a delay circuit for counting a time period comprising (a) a charging circuit operative to boost-up a voltage level at an output node thereof, (b) a resetting circuit operative to pull down the voltage level at the output node of the charging circuit prior to counting the time period, and (c) a comparator circuit operative to compare the voltage level at the output node of the charging circuit with a reference voltage level during counting said time period, and the comparator circuit is further operative to produce a delayed signal when the voltage level at the output node of the charging circuit exceeds the reference voltage level, so that the delay circuit does not need a large capacitor in comparison with a prior-art delay circuit of the RC combination type and reduces the number of component transistors comparing a prior-art delay circuit formed by a counter circuit serving as a frequency divider circuit.

REFERENCES:
patent: 3365586 (1968-01-01), Billings
patent: 4670668 (1987-06-01), Liu
patent: 4716322 (1987-12-01), D'Arrigo et al.

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