Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2000-05-24
2001-12-25
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S284000
Reexamination Certificate
active
06333652
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a delay circuit and, particularly, to a delay circuit having a delay time which is hardly influenced by variation of fabrication process thereof or a fabrication process of a semiconductor circuit internally including the delay circuit, hardly influenced by external condition such as environmental variation, etc., and can be set finely and precisely with respect to an input signal thereof.
2. Description of the Related Art
In the recent recordable/rewritable compact disk (CD-R/RW), the data write speed is increased at a double rate. In such CD-R/RW, it is usual that data, which is transferred from a host computer through an interface such as small computer system interface (SCSI) or ATPI is EFM-modulated and supplied to a laser controller. A laser light from a laser oscillator, which is regulated. for data write by the laser controller, is ON/OFF controlled by the EFM-modulated data to irradiate predetermined tracks of the compact disk (CD) to thereby write the data in the CD.
In such CD-R/RW or an optical disk such as recordable compact disk (CD-R), digital video disk random access memory (DVD-RAM), a circuit for precisely setting a delay time as short as several pico-seconds to several tens nano-seconds is required in writing data by means of a data write device.
Further, with increase of the clock speed of such as central processing unit (CPU), it has been required to precisely set a delay time as short as several pico-seconds to several tens nano-seconds in even a usual logic circuit.
In a prior art circuit for precisely setting a very short delay time, it has been usual, in order to absorb a variation of delay time of individual delay circuits or individual semiconductor circuits each including a delay circuit, which are fabricated through a fabrication process of the delay circuit or a fabrication process of the semiconductor circuit, that the delay time of each delay circuit or each semiconductor circuit including the delay circuit is set by an external voltage signal during the fabrication process since the delay time of the delay circuit is influenced by the fabrication process. Alternatively, as disclosed in Japanese Patent Application Laid-open No. H7-86888, a delay circuit is provided with a control terminal for controlling a delay time thereof and the delay time of the delay circuit is controlled by measuring a practical amount of delay of the delay circuit by a suitable measuring device and, on the basis of the measurement, applying a control signal to the control terminal of the delay circuit to set the delay time thereof appropriately. Alternatively, a delay time of each delay circuit is corrected by measuring an amount of delay thereof by forming a micro cell including an analog to digital (A/D) converter, a digital to analog (D/A) and a CPU, etc., and regulating the delay time by a processor on the basis of the measured delay time.
In any of the prior arts, in order to precisely set a very short delay time of a delay circuit with respect to an input signal, it is necessary to regulate or correct the delay time of the delay circuit by measuring a practical delay time thereof. However, since, in the delay time correction using the regulation of the external voltage, the delay circuit is easily influenced by change of external environment such as temperature change, secular change and power source voltage change, etc., there is a problem on accuracy of delay time.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a delay circuit having a delay time, which is hardly influenced by the fabrication process of a delay circuit or a semiconductor device including the delay circuit, is hardly influenced by external condition such as environmental change and can be set precisely with respect to an input signal.
In order to achieve the above object, a delay circuit according to the present invention is featured by comprising a delay element circuit composed of a series circuit of a plurality of first circuit elements, which are connected to a common power supply line and have a delay time varying correspondingly to a voltage of the common power supply line, for receiving the input signal and outputting an output signal obtained by delaying the input signal, and a phase-locked loop (PLL) circuit including an oscillator circuit composed of a series circuit of a plurality of second circuit elements, which are equivalent to the first circuit elements, respectively, and connected to the common power supply line, for oscillating the oscillator circuit at a predetermined frequency locked to a reference clock signal frequency by comparing a phase of the reference clock signal with a phase of an output frequency of the oscillator circuit and controlling the voltage of the power supply line according to a result of the comparison.
Thus, according to the present invention, the delay element circuit is formed by the first circuit elements equivalent to the respective second circuit elements of the PLL circuit and the oscillation frequency of the PLL circuit is locked to the reference clock signal frequency. Therefore, it is possible to control the delay time of the second circuit elements of the delay element circuit measured from the signal input time thereto to the signal output time to a constant value, which is determined by the reference clock signal frequency, to thereby set the delay time of the first circuit elements.
It is usual that a clock generator circuit for generating the reference clock signal frequency, which is substantially constant and is hardy influenced by external condition such as temperature change, secular change and/or power source voltage, etc., is formed internally of an integrated circuit (IC). Therefore, by utilizing such construction of a delay circuit as that of the delay circuit of the present invention, a delay circuit can be realized as a stable circuit which is hardly influenced by external condition and is free from variation in delay time.
Particularly, when a crystal oscillator, etc., is utilized as the clock generator circuit for generating the reference clock, it is possible to realize a delay circuit which does not require a delay time regulation.
REFERENCES:
patent: 4494021 (1985-01-01), Bell et al.
patent: 5619541 (1997-04-01), Van Brunt et al.
patent: 7-86888 (1995-03-01), None
Iida Jun
Iinuma Yoshikazu
Kurihara Naoki
Nemoto Takashi
Callahan Timothy P.
Cox Cassandra
Mattingly Stanger & Malur, P.C.
Rohm & Co., Ltd.
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