Oscillators – Ring oscillators
Patent
1994-07-11
1995-09-05
Grimm, Siegfried H.
Oscillators
Ring oscillators
331DIG3, H03K 303
Patent
active
054482054
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to an .apparatus for generating oscillations.
BACKGROUND OF THE INVENTION
Apparatus for generating oscillations, which are also referred to as oscillators, emit, in known manner, periodic oscillations which exhibit a sinusoidal, rectangular or other such periodic waveform.
These output signals are defined by their amplitude and by their frequency f, whose reciprocal defines the periodic time T which is also referred to as the oscillatory period. Digital switching stages are particularly suited for generating rectangular output signals,
The so-called ring oscillator, which is known for example from the book "Introduction to VLSI systems", C. Mead, L. Conway, Addison-Wesley Publishing Company, 1980, represents one known embodiment of an oscillator using digital elements.
A ring oscillator is constructed in such a way that an odd number of inverters are connected one behind the other in series in a chain whereby the output of the last inverter is connected to the input of the first inverter.
Each of these inverters causes a time delay and the oscillatory period T of the output signal is determined by the number of inverters and the respective delay times.
The oscillatory period T itself amounts to twice the total delay time.
For various applications, but in particular in those cases in which the output signal of an oscillator is intended to be monitored by means of a phase controlled (PLL) circuit, it is advantageous if the oscillatory period T substantially corresponds to the total delay time of the inverter chain being used.
SUMMARY OF THE INVENTION
The object of the present invention is to propose an apparatus for generating oscillations which contains a chain of delay elements and which makes it possible to generate periodic oscillations having an oscillatory period T which substantially corresponds to the total delay time of this chain.
In accordance with the invention, it is proposed to connect a chain of delay elements in series and to make taps at predetermined points in this series circuit whereby the signals obtained in this way are supplied to a logic stage which contains logic modules. The logic stage is connected between the output of the last delay element and the input of the first delay element.
Preferably, at least element of the chain and arranged within the chain
The logic circuit emits an input signal to the input of the first delay element. A periodic stage-output signal is derived from output signals of at least one of the delay elements or from the output signal of the logic stage. This has a periodic time T which substantially corresponds to the total delay time of the delay elements being used, in particular, when taking into account delays in the logic stage or other conceivable elements which may be arranged between the last and the first delay element. The total delay time results from the number of delay elements and their individual delay times.
The second signal causes the logic stage to switch-over the input signal whereby, possibly time delayed, a switch-over of the stage-output signal is effected.
Inverters or other such modules known to the skilled person may be used for example as suitable delay elements.
With this oscillator arrangement, the advantage is achieved that by the use of simple chips, an oscillator is realised which delivers a periodic rectangular signal whose oscillatory period T and/or duty factor TV is predeterminable.
If switch-over means are provided that alter the position of the taps for the first or the second signal, then the frequency and/or the duty factor of the output signal can still be varied thereby even after the oscillator is in operation.
By means of a reference value stage which may be formed for example as a data input device, as a store or the like, and a reference-actual comparison stage which controls the said switch-over means, the output signals can, to a large extent, be predetermined and set.
In a further embodiment, the delay elements are so constructed that the individual d
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IBM Technical Disclosure Bulletin, vol. 15, No. 10, Mar. 1973, New York, U.S., "Delay Line Oscillator" T. L. Jeremiah, pp. 3108-3109.
IBM Technical Disclosure Bulletin, vol. 32, No. 2, Jul. 1989, New York, U.S., "Phase-Locked Loop with Programmable Phase Offset" pp. 473-474.
Patent Abstracts of Japan, vol. 14, No. 151, 22 Mar. 1990 & Japanese Pat. 2010922, Fujitsu Ltd.
Introduction to VLSI Systems, Carver Mead & Lynn Conway-Addison-Wesley Publishing Co., Oct., 1980, pp. 235-236.
Deutsche Thomson-Brandt GmbH
Emanuel Peter M.
Gadson Gregory P.
Grimm Siegfried H.
Tripoli Joseph S.
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