Delay calculation method capable of calculating delay time...

Details Delay calculation method capable of calculating delay time... Delay calculation method capable of calculating delay time...

2005-07-06

2009-02-24

Rodriguez, Paul L (Department: 2123)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Timing

C716S030000

Reexamination Certificate

active

07496491

ABSTRACT:
A delay calculation method that is capable of calculating delay time with a small margin of error is provided for delay calculation in a logic circuit. The operating characteristics of transistor are expressed with a fixed resistance and a power supply voltage that changes with time. The power supply voltage is represented as a waveform which is a combination of two straight lines: the one indicating that the voltage, after a fixed delay of t0, increases to V1during Δt1; and the one indicating that the voltage increases from V1to E during Δt2and thereafter remains at the fixed value of E. A difference in the shapes of input waveforms is adopted as a correction parameter to determine the values of Δt1, V1, and Δt2.

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Zhang et al. (A delay Model and Optimization method of a Low-Power BiCMOS Logic Circuit, Oct. 1994).

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