Delay and filter network with chrominance trap between series in

Details Delay and filter network with chrominance trap between series in Delay and filter network with chrominance trap between series in

1985-11-07

1987-06-30

Groody, James J.

Facsimile and static presentation processing

Static presentation processing

Attribute control

358 31, 307520, H04N 977, H04N 964, H04B 110

Patent

active

046774629

ABSTRACT:
In a luminance channel of a color television receiver, a luminance signal is conveyed to the input of a delay line via first and second series connected source resistors. A series tuned trap tuned to the chrominance subcarrier frequency is coupled between the junction of the first and second resistors and a point of reference potential. The coaction of the first and second source resistors and the trap results in a significant reduction in frequency dependent source impedance variations at the input of the delay line.

REFERENCES:
patent: 3578901 (1971-05-01), Griepentrog
patent: 3728476 (1973-04-01), Bates et al.
patent: 4309719 (1982-01-01), Hinn
Service Data Bulletin for RCA Color Television Receiver Chassis CTC-118.
Exhibit A, showing Schematic Circuit Diagram of Delay Line Circuit No. DLC 1606, Available from TDK Corporation of Japan.

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