Delay adjusting apparatus providing different delay times by...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

Reexamination Certificate

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Details

C327S261000, C327S153000, C327S161000

Reexamination Certificate

active

06980040

ABSTRACT:
The present invention relates to a semiconductor device; and, more particularly, to a delay adjusting circuit which is required to adjust a delay time of an internal circuit in a test mode and required to verify a characteristic and a margin of the semiconductor device. The delay adjusting apparatus according to the present invention comprises: a normal delayer for delaying an input signal from an external circuit; a delay time storage for maintaining a predetermined delay time produced by a control signal and delaying the input signal based on the predetermined delay time; and a selector for selectively outputting one of output signals from the normal delayer and the delay time storage in response to a test mode signal.

REFERENCES:
patent: 5878055 (1999-03-01), Allen
patent: 6201448 (2001-03-01), Tam et al.
patent: 6222894 (2001-04-01), Lee
patent: 11-120768 (1999-04-01), None

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