Deglitched digital mixer circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307443, 3072721, 3072471, 328111, 328158, H03B 1900, G06G 700

Patent

active

050536516

ABSTRACT:
A digital mixer employs a plurality of flip-flops to mix two digital input signals and provide a beat frequency output. The first input signal is provided as a clock signal to a first D flip-flop and to a third JK flip-flop. The second input signal is provided as a clock signal to a second D flip-flop. The inverted output of the first flip-flop is provided as a clock input to a fourth JK flip-flop. The non-inverted and inverted outputs of the second flip-flop are connected, respectively, to the J and K inputs of the third flip-flop. The non-inverted outputs of the second and third flip-flops are input to a first AND gate, the output of which connects to the J input of the fourth flip-flop. Likewise, the inverted outputs of the second and third flip-flops are input to a second AND gate, the output of which connects to the K input of the fourth flip-flop. The non-inverted output of the fourth flip-flop provides a beat frequency that is one-half the difference frequency of the two input signals. The third flip-flop in the digital mixer prevents glitches around the transition time of the beat frequency output even for very low beat frequencies.

REFERENCES:
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patent: 4267514 (1981-05-01), Kimsey
patent: 4385395 (1983-05-01), Tanaka et al.
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patent: 4399412 (1983-08-01), Rinaldi
patent: 4467285 (1984-08-01), Rinaldi
patent: 4468784 (1984-08-01), Jagnow et al.
patent: 4525635 (1985-06-01), Gillberg
patent: 4739278 (1988-04-01), Des Brisay, Jr. et al.
patent: 4775840 (1988-10-01), Ohmori et al.

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