Degenerative load temperature correction for charge pumps

Details Degenerative load temperature correction for charge pumps Degenerative load temperature correction for charge pumps

2000-09-27

2002-03-12

Berhane, Adolf Deneke (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S907000

Reexamination Certificate

active

06356062

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention pertains generally to electronic circuits. In particular, it pertains to charge pump circuits.
2. Description of the Related Art
A charge pump provides an output voltage that is higher than its own supply voltage. Flash memories can use charge pumps to produce erase and program voltages.
FIG. 1A
shows a schematic of a simple charge pump circuit
1
, with two-stage charge pump
11
driving load
12
. This figure shows only capacitors C
1
-C
2
and diodes D
1
-D
3
to produce voltages V
1
, V
2
, and V
3
, with resistor RL and capacitor C
L
providing the load, although other components could be added to the circuit for improved performance.
FIG. 2B
shows the various waveforms that are produced by this circuit. The operation of charge pumps is well known, and no further description of the circuit is provided herein.
The effectiveness of a charge pump is dependent on the frequency of the clock source, since the clock cycle affects the amount of charging and discharging that takes place in the capacitors.
FIG. 2
shows a charge pump control circuit
2
. A voltage controlled oscillator (VCO)
22
provides the clock source, with its frequency being controlled by the output of differential amplifier
21
. Clock drivers
23
convert the single VCO output to the multiple clocks required to drive multi-stage charge pump circuit
24
. The voltage V
OUT
produced by charge pump circuit
24
can be sampled by voltage divider
25
, which feeds back a pre-determined fraction of V
OUT
as voltage V
FDBK
. This is compared with a stable reference voltage V
REF
by differential amplifier
21
, and the difference between V
REF
and V
FDBK
controls the output of differential amplifier
21
, which in turn controls the frequency of the VCO clock. This closed loop circuit regulates the output of the charge pumps by controlling the frequency of the clocks that operate the charge pumps. Under a given set of conditions, every charge pump circuit has an optimum frequency that produces the maximum amount of current available from the circuit.
Unfortunately, the charge pumps and the regulation circuitry are subject to variations due to both temperature changes during operation and process variations during manufacture. Typically, for a given frequency from VCO
22
, the maximum current from the charge pump circuit changes with changing temperature, so that the circuit must be overdesigned to handle the expected current demands at the worst case temperature. And process variations during manufacture can result in a circuit that is not optimized at any temperature.
FIG. 3
shows a graph of the operating characteristics of a typical charge pump circuit. The x-axis measures the VCO bias level (the voltage level at the input of the VCO), while the y-axis measures the corresponding output current, in micro-amps, that the charge pump circuit can produce. The dotted line shows the characteristics of the circuit at a temperature of 100 degrees C. For this example, the available output current is fairly constant with a bias level of up to 0.5 volts, but beyond 0.5 volts the output current drops off sharply, making the optimum bias voltage about 0.5 volts or slightly less.
The solid line shows the same curve for a temperature of −40 degrees C. The entire curve is shifted to the left by a significant amount, with the optimum bias level at about 0.3 volts. From this chart, it can be seen that a higher temperature requires a higher bias voltage, if the maximum current is to be available from the circuit at all operational temperatures.
Unfortunately, conventional circuits do not provide this adjustment, and the circuits must be designed for worst case conditions. This results in overdesign, which is more expensive and wasteful of circuit resources.


REFERENCES:
patent: 4352053 (1982-09-01), Oguchi et al.
patent: 4560959 (1985-12-01), Rokos et al.
patent: 4823070 (1989-04-01), Nelson

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