Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2001-08-14
2003-01-07
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S108000, C438S121000
Reexamination Certificate
active
06503777
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to integrated circuit packages and more particularly to ball grid array (BGA) packages.
2. Background
An increasing consideration in the design and use of integrated circuits is the package in which the integrated circuit (IC) resides. As ICs become more complex, and printed circuit boards become more crowded, IC packages continually need more leads or pins while their footprints consume smaller and smaller areas. In an effort to meet these demands, developers created the ball grid array (BGA) package.
A typical BGA package includes an IC affixed to a flexible polymide tape. A very thin conductor or wire bond connects a pad on the IC to a conductive trace on the polymide tape. The conductive trace is routed to a solder ball. The solder ball is one of an array of solder balls that connect to the opposite side of the polymide tape and protrude from the bottom of the BGA package. These solder balls interconnect with an array of pads located on a substrate, such as a printed circuit board. Accordingly, the typical BGA package electrically connects each pad on an IC to a pad on a printed circuit board.
Typical BGA packages have drawbacks arising from the different coefficients of thermal expansion for the IC and the polymide tape. In general, the coefficient of thermal expansion of a material corresponds to the degree in which the material will expand when heated and contract when cooled. As the IC and the polymide tape expand and contract at different rates, the wire bond experiences stress and tension. Such stress and tension may cause the wire bond to loosen or break, thereby disconnecting the IC from the printed circuit board.
To compensate for stress and tension caused by thermal expansion, designers have developed IC packages without wire bonds. One conventional package is a “flip chip”package. A flip chip package includes an IC affixed to a polymide tape with a thick adhesive such that the pads of the IC are positioned over a layer of conductive traces. Gaps in the adhesive provide room for a plurality of solder bumps that are used to connect the pads of the IC to the conductive traces. Similar to the typical BGA package, the conductive traces are routed to downward facing solder balls, which connect with pads of a substrate, such as a printed circuit board.
Accordingly, the solder bumps of the flip chip package provide an electrical connection from the pads of the IC to the layer of conductive traces. Unfortunately, several drawbacks of these packages can prevent a good electrical connection from happening. For rid example, the solder bump and adhesive dimensions need to be matched with a great deal of accuracy. When the solder bump diameter is small as compared to the thickness of the adhesive, the solder bump cannot connect the pads of the IC to the conductive traces. On the other hand, when the solder bump diameter is large as compared to the thickness of the adhesive, then the adhesive layer cannot sufficiently affix the IC to the tape. Furthermore, when the solder bumps are heated to cause the solder to reflow, air pockets or bubbles can form. These air pockets not only make for a poor electrical connection, but also further exacerbate the relatively narrow tolerances allowed for the solder bump and adhesive.
These drawbacks can cause the loss of an electrical connection between the IC pads and the conductive traces. Such loss lowers yield rates, which in turn increases the overall cost of package manufacture.
SUMMARY OF THE INVENTION
One aspect of the invention is to provide a package having an electrical connection between an IC and an interposer. The package comprises a solder bump, a solder ball, and an interconnect having a deflectable cantilever. When the IC is affixed to the interconnect, the solder bump applies surface tension to the deflectable cantilever, thereby causing the cantilever to deflect downward. When the solder bump is heated and the solder reflows, the reflowing solder releases the surface tension on the cantilever. According to one aspect of the invention, the cantilever then springs back toward its original position, within the reflowing solder. Thus, the reflowing solder partially absorbs the cantilever.
In one embodiment, use of a deflectable cantilever advantageously provides for greater absorption of the interconnect into the solder, thereby reducing the possible effects of air pockets. In another embodiment, use of a larger diameter solder bump advantageously provides more solder, thereby also reducing the possible effects of air pockets.
Another aspect of the invention relates to a ball grid array package for an integrated circuit. The ball grid array package interconnects a plurality of solder bumps on an integrated circuit with a plurality of solder balls located on the exterior of the ball grid array package. The ball grid array package comprises at least one solder bump attached to an integrated circuit and at least one solder ball which is configured to interface with a printed circuit board. The ball grid array package further comprises an interposer with at least one pocket and at least one via, wherein the pocket is configured to receive the solder bump and wherein the via is configured to receive the solder ball.
The ball grid array package further comprises a conductive interconnect circuit which electrically interconnects the solder ball in the via with the solder bump in the pocket. The conductive interconnect circuit further comprises at least one deflectable cantilever which extends into the pocket such that the deflectable cantilever is partially absorbed by the solder bump in the pocket.
One embodiment of the invention relates to an integrated circuit package that comprises at least one solder connection attached to an integrated circuit. The integrated circuit package further comprises a substrate with an opening which is configured to receive the solder connection attached to the integrated circuit. The integrated circuit package also comprises a resilient cantilever which extends into the opening such that the resilient cantilever applies pressure to the solder connection during reflow.
Another embodiment of the invention relates to an apparatus that comprises an interconnect layer with a first opening. The apparatus further comprises a conductor layered above the interconnect layer. The conductor comprising a deformable portion that extends into the first opening, wherein the deformable portion has resiliency that urges the deformable portion into a solder connection.
An additional embodiment relates to an integrated circuit package that comprises a first solder connection in communication with an integrated circuit. The integrated circuit package further comprises an interconnect layer having a first opening. The integrated circuit package also comprises a conductor layered above the interconnect layer. The conductor comprising a deflectable portion that extends into the first opening, wherein the deflectable portion has resiliency that urges the deflectable portion into the solder connection during reflow.
One embodiment of the invention relates to an apparatus comprising a substrate with an opening. The apparatus further comprising a conductive layer above the interconnect layer. The conductive layer comprising at least two malleable portions which extend into the opening. In another embodiment a package comprises an integrated circuit having a pad and a solder connection in communication with the pad. The package further comprises a partially deflected first conductor and a partially deflected second conductor. The partially deflected first and second conductors each at least partially absorbed by the solder connection.
In an additional embodiment, an apparatus comprises a substrate with an opening. The apparatus further comprises a conductive layer above the interconnect layer. The conductive layer comprising at least two flaps which extend into the opening. Yet another embodiment relates to a package that comprises an i
Geyer Scott
Knobbe Martens Olson & Bear LLP
Micro)n Technology, Inc.
Sherry Michael
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