Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation
Reexamination Certificate
2011-04-12
2011-04-12
Thangavelu, Kandasamy (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Circuit simulation
C703S022000, C716S106000
Reexamination Certificate
active
07925489
ABSTRACT:
A design is simulated utilizing a hardware description language (HDL) simulation model by stimulating the HDL simulation model with a testcase. The HDL simulation model includes instrumentation not forming a portion of the design that includes a count event counter for a count event in the design, and the simulation includes counting occurrences of the count event in the count event counter to obtain a count event value. A threshold is also established for an aggregate count event value for the count event counter. After completion of the testcase, a determination is made whether addition of the count event value to the aggregate count event value for the count event counter would cause the aggregate count event value to exceed the threshold. If not, the count event value is recorded in a testcase data storage area, and the count event value is accumulated in the aggregate count event value. If so, the count event value is discarded without recording the count event value in the testcase data storage area.
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Silver, David, Office Action dated Feb. 1, 2010; U.S. Appl. No. 11/930,866.
Behm Michael L.
Gabele Carol I.
Williams Derek E.
Dillon & Yudell LLP
International Business Machines - Corporation
Thangavelu Kandasamy
LandOfFree
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