Defect tolerant binary synchronization mark

Details Defect tolerant binary synchronization mark Defect tolerant binary synchronization mark

1998-02-17

1999-12-07

Williams, Howard L.

Coded data generation or conversion

Digital code to digital code converters

To or from run length limited codes

H03M 700, H03M 1300

Patent

active

059991100

ABSTRACT:
Disclosed is an error tolerant binary encoded synchronization mark concatenated with a known pattern, such as a VFO pattern, comprising an encoded pattern of a fixed plurality of bits, the encoded synchronization pattern being at maximum Hamming distance from the concatenated known pattern for the number of bits in the fixed plurality of bits. The error tolerant synchronization mark may also be concatenated with the VFO pattern seen in reverse, and the synchronization pattern additionally is at maximum Hamming distance from the concatenated known VFO pattern seen in reverse.

REFERENCES:
patent: 3740125 (1973-06-01), Harris
patent: 4933786 (1990-06-01), Wilson
patent: 5481413 (1996-01-01), Kawada et al.
patent: 5485461 (1996-01-01), Asgari
patent: 5491479 (1996-02-01), Wilkinson
patent: 5856986 (1999-01-01), Sobey

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