Defect monitor for semiconductor manufacturing capable of...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Reexamination Certificate

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10902668

ABSTRACT:
A mechanism is provided to address a structure under test and to identify a point of failure. A test open line carries a signal that indicates whether a structure under test is open or closed. A test short line carries a signal that indicates whether a structure under test is shorted. A test structure may include an array of cells, where each cell includes a circuit including structures to test. The cells may be scanned using scan only latches and signals on the test open and/or test short lines may be recorded. A test circuit may include a digital mode and an analog mode. The digital mode provides an open or closed value. The analog mode includes a programmable load. The output of the analog mode provides a resistance value that is relative to the programmable load.

REFERENCES:
patent: 4719411 (1988-01-01), Buehler

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