Television – Special applications – Manufacturing
Reexamination Certificate
1999-04-20
2002-09-24
Lee, Young (Department: 2613)
Television
Special applications
Manufacturing
C348S092000, C348S126000, C348S130000
Reexamination Certificate
active
06456318
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a visual inspection apparatus and method, and more particularly to a visual inspection apparatus and method applied to find defects in patterns on a semiconductor wafer, a photo mask, a liquid crystal display, or the like.
2. Description of Related Art
Conventionally, two adjacent chips are compared to each other in order to inspect patterns on a semiconductor wafer, a photo mask, a liquid crystal display, or the like. In order to inspect the patterns, an image obtaining part, which is composed of an optical microscope and an imaging device such as a time delay and integration (TDI) sensor, obtains images of the patterns represented with multiple values while continuously scanning the object along the x-axis. The obtained images are stored in an image data storage part such as a memory. When two images in the corresponding areas on the adjacent first and second chips are obtained, sub-pixel alignment is performed for these two images at regular frame intervals, and the two images are compared with each other on a pixel-by-pixel basis. In this comparison, a pair of a pixel of the first image and the corresponding pixel of the second image that has a gray level difference in excess of a preset threshold is recognized as having a possibility of being defective. At this point in such single detection, it is not clear which chip of the first and second chips has a possibility of being defective, and thus, a differential image of the first and second images is temporarily stored in a defect detecting part as two values. The above-mentioned comparison is performed between the second chip and the third chip to obtain another differential image, which is collated with the differential image of the first and second chips. It is therefore possible to determine which chip of the first and second chips has a possibility of being defective. In this detecting method (double detection), it is possible to determine defective parts on the chips and improve the reliability of the results since the same chip is subjected to the comparison twice.
In the conventional method, however, each chip is compared with two adjacent chips regardless of whether the chip has a possibility of being defective or not. Therefore, an image comparison part must have the adequate capacity for this purpose, which requires a higher cost.
Only the single detection is performed for edge chips. Thus, the unreliable inspection must be allowed, only the edge chips are not determined, or, only the area that is determined as having a possibility of being defective as a result of the single detection is scanned again after the inspection with respect to the entire surface of the wafer, and the edge chip is compared with the second chip from the edge chip to thereby determine whether the edge chip has a possibility of being defective.
Alternatively, in a scanning method of Japanese Patent Provisional Publication No. 2-210249, the last chip in each scanning line is compared with the first chip in the next scanning line in the double detection. Since, however, the straightness in the scanning direction along the x-axis is higher than the absolute position accuracy along the y-axis, the difference of the images along the y-axis is greater than that of the images of chips in the same scanning lines. Consequently, the images are badly deteriorated by the sub-pixel alignment during the comparison of the images.
SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of the present invention to provide a visual inspection apparatus, which is capable of detecting defects accurately, reducing processing and increasing processing speed.
To achieve the above-mentioned object, the present invention is directed to a visual inspection apparatus, comprising: an imaging means for obtaining images of a plurality of areas on an object; a first image comparison means for designating the plurality of areas in pairs and comparing the images of the areas in each of the pairs to determine whether said each of the pairs is a defective pair including a defective area containing a defective part; and a second image comparison means for comparing the image of one of the areas in the pair determined as the defective pair by the first image comparison means with the image of one of the areas in another of the pairs to determine whether the one of the areas in the pair determined as the defective pair is the defective area.
The first image comparison means may designate the plurality of areas in the pairs of two areas adjacent to one another.
The second image comparison means may compare the image of the one of the areas in the pair determined as the defective pair with the image of one of the areas in another of the pairs adjacent to the one of the areas in the pair determined as the defective pair.
The second image comparison means may compare only a suspected part, including a possible defective part determined by the first image comparison means, of the image of the one of the areas in the pair determined as the defective pair with a part, corresponding to the suspected part, of the image of the one of the areas in said another of the pairs.
According to the present invention, the images of all areas on the object are not always compared twice. The areas are paired, and two images are compared in each pair. Only an image in the pair, which is possibly defective is compared with an image in another pair. This reduces the number of comparisons to almost fifty percent of that of the prior art and increases the processing speed while maintaining the reliability of the conventional double detection.
REFERENCES:
patent: 4791586 (1988-12-01), Maeda et al.
patent: 5153444 (1992-10-01), Maeda et al.
patent: 5295198 (1994-03-01), Maney
patent: 197 34 486 (1998-02-01), None
patent: 0 374 694 (1990-06-01), None
patent: 61038450 (1986-02-01), None
patent: A-2-210249 (1990-08-01), None
patent: 10054806 (1998-02-01), None
patent: 350111 (1999-01-01), None
patent: WO 96/39619 (1996-12-01), None
Lee Young
Oliff & Berridg,e PLC
Tokyo Seimitsu Co. Ltd.
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