Defect free CMOS process

Details Defect free CMOS process Defect free CMOS process

1993-08-27

1996-11-05

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 41, 437 45, 437160, H01L 21265, H01L 2170, H01L 2700, H01L 21225

Patent

active

055717446

ABSTRACT:
A method for manufacturing CMOS semiconductor devices wherein damage to the active regions of the devices due to the direct implantation of impurities is suppressed. A material is selectively deposited on a semiconductor substrate, the material having a characteristic such that formation of the material occurs on some substances such as silicon and polysilicon, and formation of the material is suppressed on other substances such as silicon dioxide and silicon nitride. Impurities are introduced into the material rather than into the substrate. The impurities are then diffused into the active regions by standard processes such as rapid thermal anneal (RTA) or furnace anneal. The material generally contains germanium, and usually is a polycrystalline silicon-germanium alloy. The diffusion depth of the impurities may be controlled with great precision by manipulating several parameters. The parameters include the thickness of the material, the energy of the impurity implants, the density of the impurity implants, and the concentration of germanium in the material.

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