Boots – shoes – and leggings
Patent
1997-12-19
1999-03-23
Teska, Kevin J.
Boots, shoes, and leggings
36446817, 36446828, 356237, G06F 1750
Patent
active
058869093
ABSTRACT:
Defects in integrated circuit wafers (10) are often difficult to diagnose, because patterned wafer inspections can only be done after certain wafer processing steps. Defect simulation is used to understand the relation between defects in the wafer (10) and the resulting wafer profiles. Defects such as particles (50) and bubbles (22) in the photoresist (28), for example, translate into a wide variety of defective profiles. Knowledge of the relation between defects and the defect profiles can assist in yield improvement efforts, since defects may be diagnosed by comparing simulated and observed defect profiles. From the simulated defect profiles, methods can be adapted to fix or correct observed defects.
REFERENCES:
patent: 5585210 (1996-12-01), Lee et al.
patent: 5586039 (1996-12-01), Hirsch et al.
patent: 5808735 (1998-09-01), Lee et al.
Article Entitled, Photoresist Defect Diagnosis Using a Rigorous Topography Simulator, Author: Milor et al.
Article Entitled, Photoresist Process Optimization For Defects Using A Rigorous Lithography Simulator, Author: Milor et al.
Article Entitled, The Application Of Lithography Defect Simulation To Submicron CMOS Yield Improvement Efforts, Author: Milor et al.
Milor Linda
Peng Yeng-Kaung
Phan Khoi Anh
Steele David
Advanced Micro Devices , Inc.
Phan Thai
Teska Kevin J.
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