Deep trench isolation with surface contact to substrate

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357 48, 357 49, 357 59, H01L 27040, H01L 29040

Patent

active

049807471

ABSTRACT:
A trench structure and fabrication technique is disclosed for isolating adjacent circuits in an integrated circuit. A trench (26) is coated with an oxidation barrier (18) of silicon to protect underlying semiconductor regions (34, 36) from crystal faults and dislocations caused by high temperature oxidation. The trench (26) includes a bottom (50) formed of the substrate (10). The trench (26) is filled with a conductive material which is in electrical contact with the substrate (10). A top surface contact electrode (74) is formed over the trench, in contact therewith, thereby also contacting the underlying substrate (10). For very narrow trenches, semiconductor areas (68, 70) are formed adjacent the top of the trench to thereby provide additional contact surface for the electrode (74).

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