Deep trench isolation for thyristor-based semiconductor device

Semiconductor device manufacturing: process – Making regenerative-type switching device – Having field effect structure

Reexamination Certificate

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C438S133000, C438S136000, C438S137000, C438S138000, C438S139000

Reexamination Certificate

active

07351614

ABSTRACT:
A thyristor-based semiconductor device includes a filled trench separating and electrically insulating adjacent thyristor control ports. According to an example embodiment of the present invention, the filled trench is formed in a substrate adjacent to at least one thyristor body region. The filled trench includes a conductive filler material, an insulative material formed on the conductive filler material and at least two laterally-adjacent thyristor control ports separated from one another by the conductive filler material and the insulative material. One of the control ports is adapted for capacitively coupling to the thyristor body region for controlling current in the thyristor. With this approach, two or more control ports can be formed in a single filled trench and electrically isolated by the conductive filler material/insulative material combination. In addition, the single filled trench can further be used to electrically isolate other circuitry, such as conductive shunts to buried circuit nodes in the substrate. These approaches are particularly useful, for example, in high-density applications where insulative trenches having high aspect ratios are desired (e.g., where it is difficult to fill lower portions of the trench with insulative material), and for reducing manufacturing complexity.

REFERENCES:
patent: 6104045 (2000-08-01), Forbes et al.
patent: 6225165 (2001-05-01), Noble, Jr. et al.
patent: 6229161 (2001-05-01), Nemati et al.
patent: 6727528 (2004-04-01), Robins et al.
patent: 6906354 (2005-06-01), Hsu et al.
Stanley Wolf Ph.D. and Richard N. Tauber Ph.D., “Silicon Processing for the VLSI Era,” vol. 1, 1986, pp. 285-286.
S.M. Sze, Physics of Semiconductor Devices, A Wiley-Interscience Publication, Second Edition, 1981, pp. 397 and 442.
Ponomarev et al., High-Performance Deep SubMicron CMOS Technologies with Polycrystalline-SeGe Gates, IEEE Transactions on Electronic Devices, vol. 47, No. 4, pp. 848-855, Apr. 2000.
Ponomarev et al., A 0.13um Poly-SiGe Gate CMOS Technology for Low-Voltage Mixed-Signal Applications, IEEE Transactions on Electronic Devices, vol. 47, No. 7, pp. 1507-1513, Jul. 2000.
Ponomarev et al., Gate-Workfunction Engineering Using Poly-(Se, Ge) for High-Performance 0.18 um CMOS Technology, IEDM Tech. Dig., pp. 829-832, 1997.

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