Dedicated redundancy circuits for different operations in a...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185110, C365S185170, C365S185210, C365S185230

Reexamination Certificate

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06914814

ABSTRACT:
A flash memory device can include a first redundancy circuit configured to provide read repair information for read operations to the flash memory. The flash memory device can also include a second redundancy circuit, separate from the first redundancy circuit, configured to provide write repair information for write operations to the flash memory. The flash memory device can include a dedicated-read operation redundancy circuit configured to provide read repair information and a dedicated-write operation redundancy circuit configured to provide write repair information. The flash memory device can include also include a first redundancy circuit configured to store an address of a defective memory cell in the flash memory and a second redundancy circuit, separate from the first redundancy circuit, configured to store the address of the defective memory cell.

REFERENCES:
patent: 5347484 (1994-09-01), Kwong et al.
patent: 5699306 (1997-12-01), Lee et al.
patent: 6240040 (2001-05-01), Akaogi et al.
patent: 6381174 (2002-04-01), Roohparvar et al.
patent: 6462994 (2002-10-01), Kim
patent: 6469932 (2002-10-01), Roohparvar et al.
patent: 95003400 (1995-04-01), None
Notice to File a Response/Amendment to Examination Report; Korean Application No.: 2002-55290; Sep. 14, 2004.

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