Boots – shoes – and leggings
Patent
1995-04-11
1996-01-02
Oberley, Alvin E.
Boots, shoes, and leggings
395821, 395427, 395800, 364230, 3642303, 3642833, 3642834, 3642456, 364DIG1, 3649644, 3649671, 364DIG11, G06F 300, G06F 1206, G06F 1320, G06F 1516
Patent
active
054817072
ABSTRACT:
A computer system performs memory to memory transfer, task scheduling and I/O request handling via a group of dedicated processors (e.g. a memory interface unit, an I/O unit, a data transfer unit, and a task control unit). The memory interface unit facilitates data interaction between the memory and the remainder of the system. The I/O unit is coupled to the memory interface unit and performs high level I/O job functions including I/O job scheduling, I/O job path selection, gathering of job statistics and device management. The data transfer unit is coupled to the memory interface unit and moves data between memory locations. The task control unit, coupled to the memory interface unit, allocates and deallocates events, maintains the status of tasks running on the system and schedules the execution of tasks. A hierarchical error reporting scheme is used by all of the processors.
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Genetti Wayne A.
Gunnarsson Gunnar K.
Murphy, Jr. Philip A.
Pullin Edward J.
Thompson Steven A.
Oberley Alvin E.
Richey Michael T.
Unisys Corporation
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