Boots – shoes – and leggings
Patent
1991-01-30
1993-10-12
Harrell, Robert B.
Boots, shoes, and leggings
3642305, 364239, 3642399, 3642421, 3642459, 3642472, 3642476, 3642469, 3642473, 36424692, 3642514, 3642551, 364258, 3642584, 364259, 3642592, 3642599, 3642613, 3642614, 3642615, 3642624, 3642627, 3642628, 3642629, 3642632, 3642633, 364DIG1, 364DIG2, G06F 702, G06F 930, G06F 922, G06F 934
Patent
active
052533492
ABSTRACT:
In a data processing system, including a memory subsystem and a CPU subsystem coupled to the memory subsystem for processing program instructions stored in the latter, the present disclosure describes an arrangement for improving the handling of type 1 dyadic instructions in the CPU subsystem. Type 1 dyadic instructions generally involve the logical processing of two operands in the CPU, and the writing of an associated result function to a designated location in memory at which one of the two operands originated. In accordance with the present invention, the result is compared with the origin operand at an appropriate instant in the instruction execution sequence and the writing operation is conditioned on this comparison. If the compared values are different the writing operation is allowed to continue, but if the compared values are equal the writing operation is skipped; thereby eliminating CPU and memory operating cycles otherwise required for completing the writing action.
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Brown W. J.
Harrell Robert B.
International Business Machines - Corporation
Lieber R.
Pan Daniel H.
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