Deconvolution input buffer compensating for capacitance of a swi

Details Deconvolution input buffer compensating for capacitance of a swi Deconvolution input buffer compensating for capacitance of a swi

1995-12-19

1998-04-14

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327382, 327389, 327391, 327108, 326 27, H03K 1716, H03K 1900

Patent

active

057397139

ABSTRACT:
A buffer which provides compensation for the RC time delay introduced by a switch matrix of a high density programmable logic device (PLD). The buffer includes circuitry to provide an input threshold which varies to compensate for the RC delay of the switch matrix on a high to low input signal transition. The buffer further includes a negative hysteresis circuit to prevent oscillations on slow rate low to high input signal transitions.

REFERENCES:
patent: 4355284 (1982-10-01), Acker
patent: 4539489 (1985-09-01), Vaughn
patent: 4571504 (1986-02-01), Iwamoto
patent: 5012141 (1991-04-01), Tomisawa
patent: 5321326 (1994-06-01), Shigehara et al.
patent: 5347177 (1994-09-01), Lipp
patent: 5396109 (1995-03-01), Oshiba
patent: 5495195 (1996-02-01), Fontana et al.
IBM Technical Disclosure Bulletin, Process Tracking Delay Element, vol. 36, No. 09A, Sep. 1993.

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