Decommutator patchboard verifier

Excavating

Patent

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Details

371 25, 324 51, 324 73AT, G01R 3128, G06F 1100

Patent

active

042675944

ABSTRACT:
A system for automatically verifying the connections between terminals of a patchboard. The system includes a back plane having a plurality of plugs provided therein corresponding to the pins of the patchboard so that the patchboard can be plugged therein. A plurality of decoders are connected to the plugs of the back plane so that a signal can be sequentially applied to each plug of the back plane under control of a stepping register and a control circuit. A plurality of data selectors are also connected to the plugs of the back plane and under control of a second external register and said control circuit sequentially make connections between an output circuit and the plugs of the back plane so as to patch the signal applied to a respective plug through a patch connection to the output circuit. By making the above connections in a controlled manner, the precise locations of the patches on the patchboard can be identified and compared with previously stored information in a memory unit.

REFERENCES:
patent: 3904861 (1975-09-01), McNamara
patent: 4042832 (1977-08-01), Cassarino, Jr. et al.
patent: 4114093 (1978-09-01), Long
patent: 4174805 (1979-11-01), Fulks et al.
patent: 4176780 (1979-12-01), Sacher et al.
patent: 4194113 (1980-03-01), Fulks et al.

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