Decoding shortened cyclic block codes

Details Decoding shortened cyclic block codes Decoding shortened cyclic block codes

1979-03-29

1981-11-03

Atkinson, Charles E.

Excavating

G06F 1110

Patent

active

042989817

ABSTRACT:
A method of and apparatus for decoding a shortened cyclic block code in which the received codeword is serially shifted forwardly through a bidirectional syndrome register with the generator word being so subtracted from the register content as to effect division of the received codeword leaving the remainder in the register, and, if the remainder is larger than the maximum correctable error, the register contents are so reverse shifted as to reverse the division operation until the register contents are not larger than the maximum correctable error, the register contents then being combined with the received codeword to produce a corrected word. The codeword length does not have to be artificially increased to that of the maximum length code, and thus a reduction of the processing time can be obtained.

REFERENCES:
patent: 3373404 (1968-03-01), Webb
patent: 3537103 (1970-10-01), Webb
patent: 3805232 (1974-04-01), Allen
patent: 3811108 (1974-05-01), Howell
R. F. Salava, Implementation and Performance of an Error Correction System, _Proceeding of National Electronics Conf., Oct. 1964, vol. 20, pp. 693-698.
Kai Ping Yiu, Feedback Polynomial of a Majority Logic Decoder, Electronics _Letters, Apr. 15, 1976, vol. 12, Nr. 8, London, Gt. Britain, pp. 195-196.

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