Decoding scheme for a dual resistor string DAC

Details Decoding scheme for a dual resistor string DAC Decoding scheme for a dual resistor string DAC

1997-12-22

1999-11-02

Tokar, Michael

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

341159, H03M 166, H03M 136

Patent

active

059778989

ABSTRACT:
A decoding scheme for a dual string DAC which reduces the size of the decoding logic while also reducing the number of switches between the two strings of resistors and also eliminating the need for Op-amps between the coarse and fine resistor strings. The present invention provides a decoding circuit to select adjacent pairs of taps 24 of the coarse resistor string 12 using simple decoding blocks 36. In one embodiment of the present invention, a 14 bit decoder is constructed with a course decoding logic of four 3-bit decoders, two levels of switches, an add-one circuit, a multiplexer, and a small amount of overflow logic. An advantage of the present invention is reduced area and power needed to implement the decoding logic for a decoder having only two levels of switches between the coarse and fine resistor strings.

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