Decoding circuit for decoding multibit data, and a display...

Details Decoding circuit for decoding multibit data, and a display... Decoding circuit for decoding multibit data, and a display...

2008-07-01

2008-07-01

Mai, Lam T (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S144000

Reexamination Certificate

active

07394419

ABSTRACT:
In each of sub-decoding circuits at a first stage provided for a plurality of output candidates arranged adjacently, for selecting corresponding output candidates in accordance with a bit of multibit data for transmission to subsequent stage sub-decoding circuits, unit decoders are arranged in parallel in a direction perpendicular to an arranging direction of the output candidates. A size in a vertical direction along which reference voltages of the output candidates of a decoding circuit are arranged can be reduced without increasing a size in a horizontal direction.

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patent: 2003-29687 (2003-01-01), None
patent: 2003-241716 (2003-08-01), None
patent: 2005-283777 (2005-10-01), None

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