Decoder system with 2.53 frame display buffer

Details Decoder system with 2.53 frame display buffer Decoder system with 2.53 frame display buffer

1997-03-14

2000-10-03

Lee, Richard

Pulse or digital communications

Bandwidth reduction or expansion

Television or motion video signal

348409, 348416, 348718, H04N 732

Patent

active

061283401

ABSTRACT:
A decoder system is provided for decoding an input video signal. A buffer memory hold slices of reconstructed B-pictures for display. The decoder is controlled in accordance with an amount of available memory in the buffer (the amount of available memory in the buffer depends both on how much data has been decoded and also upon how much data has been displayed). In addition, a buffer memory input controller controls into which locations of the buffer memory the slices of the reconstructed B-pictures are stored. As a result, only 2.53 frames of buffer memory are required.

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