Computer graphics processing and selective visual display system – Display driving control circuitry
Reexamination Certificate
2007-02-06
2007-02-06
Chow, Dennis-Doon (Department: 2629)
Computer graphics processing and selective visual display system
Display driving control circuitry
C345S055000, C345S100000
Reexamination Certificate
active
10669477
ABSTRACT:
A decoding system which is arranged to perform a plural-stage process in determining which of the driver lines to stimulate in response to each electrode address value supplied to the decoder. This enables the network configuration of the impedances to be machine generated, and also enables the decoder to calculate on the fly which driver lines to stimulate in response to each address value. Furthermore, different resolutions may be provided to enable groups of the electrodes to be addressed simultaneously. Such a decoder arrangement may also be used with an electrode arrangement in which each electrode is connected to only two of the driver lines, in order to achieve addressing schemes in which up to t consecutive electrodes can be driven simultaneously. The invention is applicable, for example, to liquid crystal displays, arrays of memory elements and arrays of sensors such as light-sensors.
REFERENCES:
patent: 3871003 (1975-03-01), Kondo et al.
patent: 3898616 (1975-08-01), Baugh et al.
patent: 4104735 (1978-08-01), Hofmann et al.
patent: 5021688 (1991-06-01), Leforestier et al.
patent: 5034736 (1991-07-01), Bennett et al.
patent: 5122873 (1992-06-01), Golin
patent: 5278961 (1994-01-01), Mueller
patent: 5369621 (1994-11-01), Mason
patent: 5412614 (1995-05-01), Bird
patent: 5430461 (1995-07-01), Tsai
patent: 5592160 (1997-01-01), Bennett et al.
patent: 5640365 (1997-06-01), Imamiya et al.
patent: 5721709 (1998-02-01), Nakamura
patent: 5852469 (1998-12-01), Magai et al.
patent: 6243287 (2001-06-01), Naffziger et al.
patent: 6275442 (2001-08-01), Hill et al.
patent: 8-287686 (1996-11-01), None
Beth, T.,Design Theory, Cambridge University Press, 1993. pp. 305-346.
Beth, T.,Design Theory, vol. 2, Cambridge Univerity Press, 1999, pp. 937-939.
Brouwer, A.E., et al., “A New Table of Constant Weight Codes”,IEEE Transactions on Information Theory, vol. 36, No. 6, Nov. 1990, pp. 1334-1380.
Kobayashi, M., et al., “Electrostatic Recording Method Using Transformer Assemblies Based on Error-Correcting Codes”,IEEE Transactions on Electron Devices, vol. Ed-25, No. 1, Jan. 1978, pp. 1-7.
MacWilliams, F.J., et al.,Theory of Error-Correcting Codes, 1977, pp. 307-315, 523-531, 683-691.
Minnick, R.C., et al., “Magnetic Core Access Switches”,IRE Transactions on Electronic Computers, Jun. 1962, pp. 352-368.
Moreno, O., et al., “New Constructions of Optimal Cyclically Permutable Constant Weight Codes”,IEEE Transactions on Information Theory, vol. 41, No. 2, Mar. 1995, pp. 448-455.
Nguyen, Q.A., et al., “Constructions of Binary Constant-Weight Cyclic Codes and Cyclically Permutable Codes”,IEEE Transactions on Information Theory, vol. 38, No. 3, May 1992, pp. 940-949.
Singleton, R., “Load-Sharing Core Switches Based on Block Designs”,IRE Transactions on Electronics Computers, Jun. 1962, pp. 346-352.
Chow Dennis-Doon
Ladas & Parry LLP
LandOfFree
Decoder system capable of performing a plural-stage process does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Decoder system capable of performing a plural-stage process, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Decoder system capable of performing a plural-stage process will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3829371