Decoder scheme for fully associative translation-lookaside buffe

Details Decoder scheme for fully associative translation-lookaside buffe Decoder scheme for fully associative translation-lookaside buffe

1993-02-22

1994-03-29

Fears, Terrell W.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36518901, 36518904, 36518907, 36523008, G11C 1500, G11C 1300

Patent

active

052991474

ABSTRACT:
A fully associative translation lookaside buffer (TLB) using a content addressable memory (CAM) array to store virtual addresses and a static random access memory (SRAM) array to store corresponding physical addresses. The TLB incorporates a logic circuit that allows the SRAM to be accessed during both associative and non-associative modes by word lines that are strictly a function of corresponding match lines. Additionally, the logic circuit incorporated in the TLB does not introduce any additional delay in outputting the physical address from the SRAM during the associative mode.

REFERENCES:
patent: 4646271 (1987-02-01), Uchiyama

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