Decoder mode validation apparatus for pay television systems

Details Decoder mode validation apparatus for pay television systems Decoder mode validation apparatus for pay television systems

1977-02-23

1978-05-23

Buczinski, S. C.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

3401461A, 358124, H04N 144

Patent

active

040914178

ABSTRACT:
A predetermined pattern of code signals is periodically inserted into the transmitted encoded television signal. The pattern is so chosen that a bistable circuit at the receiver changes state for each received signal. A counter counts the number of state changes and, if correct, a validation signal is furnished. The validation signal allows recording of the billing charge for the program and transmission of the decoded signal to the television receiver.

REFERENCES:
patent: 3081377 (1963-03-01), Watters
patent: 3757035 (1973-09-01), Sullivan
patent: 3781472 (1973-12-01), Goode et al.
patent: 3824332 (1974-07-01), Horowitz
patent: 3885089 (1975-05-01), Callais et al.
patent: 3886302 (1975-05-01), Kosco
patent: 3899633 (1975-08-01), Sorenson
patent: 3916091 (1975-10-01), Kirk, Jr. et al.

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