Boots – shoes – and leggings
Patent
1993-05-28
1994-03-08
Lee, Thomas C.
Boots, shoes, and leggings
395800, 364DIG1, 3642318, 3642624, G06F 938
Patent
active
052935922
ABSTRACT:
An improved instruction decoder is described which uses parallel stages which operate in a pipeline fashion. The decoder is particularly useful in a microprocessor which has variable length instructions. The first stage decodes the OP code and register and address mode specifier fields while the second stage directs the sequencing of address calculations. The first two lines of microcode are provided by the first stage as well as a look up to microcode in the microcode memory.
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Fu Beatrice
Gelsinger Patrick P.
Donaghue L.
Intel Corporatino
Lee Thomas C.
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